1. Field of the Invention
The present invention relates generally to semiconductor memory devices, and more particularly to a circuit for generating a high voltage power supply in a semiconductor memory device.
2. Description of the Prior Art
As semiconductor memory devices become more highly integrated, lower operating supply voltages must be used to reduce stress on circuits and elements resulting from high electric fields from the power supply. However, even memory devices that operate at reduced power supply voltages often require a high voltage power supply for certain circuits and operations such as driving a word line during an enable operation and driving an isolation gate control signal which is used to selectively switch isolation gates in memory devices having a charge sharing sense amplifier configuration.
Various pumping circuits for generating high voltages have been developed. The circuits are generally classified into two types: standby pumping circuits which supply small amounts of current at a high voltage level, and active pumping circuits which typically supply larger amounts of current at high voltages than the standby circuits, since the amount of charge used by a semiconductor memory device in active mode is typically larger than that used in standby mode.
FIG. 1 is a block diagram of a conventional high-voltage generating circuit (also called a pumping voltage generating circuit) for use in standby mode in a semiconductor memory device. As shown in FIG. 1, a conventional standby high voltage generating circuit includes an oscillator 10, and pumping means 12 having an input terminal connected to an output terminal of the oscillator 10. The pumping means 12 also has a voltage terminal for inputting a first (or internal) supply voltage which is used as the operating power supply for the chip. The pumping means 12 has an output terminal for outputting a second supply voltage or desired high voltage which is higher in level than the external supply voltage. The conventional standby high voltage generating circuit further includes a detector 14 connected in a feedback manner between the output terminal of the pumping means 12 and an input terminal of the oscillator 10.
In operation, the pumping means 12 (typically a charge pump) boosts the voltage of the first power supply signal to a higher voltage second power supply voltage signal in response to a train of periodic pulses generated by oscillator 10. The detector 14 detects the voltage level of the second power supply signal and, in accordance with the detected signal, controls the oscillator to prevent the second power supply voltage level from exceeding a predetermined level. Thus, the circuit of FIG. 1 pumps the first power supply voltage to a second power supply voltage in a standby mode.
FIG. 2 is a block diagram of a conventional high voltage generating circuit for a use in active mode in a semiconductor memory device. As shown in this drawing, the conventional active high voltage generating circuit includes an active kicker enable circuit 16, and pumping means 18 having an input terminal connected to an output terminal of the active kicker enable circuit 16. The pumping means 18 also has a voltage terminal for inputting a first (or internal) supply voltage which is used as the operating power supply for the chip. The pumping means 18 has an output terminal for outputting a second supply voltage or desired high voltage which is higher in level than the external supply voltage.
In operation, the active kicker enable circuit 16 generates a master clock signal at a frequency in accordance with the demands of the circuits in the semiconductor memory device which require a high voltage supply. The pumping means (charge pump) 18 boosts the voltage level of the first power supply signal to the voltage level of the second power supply signal in response to the master clock signal from the active kicker enable circuit 16. As a result, the circuit of FIG. 2 supplies a large amount of charge at a high voltage level to the semiconductor memory device in the active mode. The amount of charge supplied is determined in accordance with the demands of the semiconductor memory device.
The construction and operation of the prior art standby and active pumping generating circuits of FIGS. 1 and 2 are well-known, and thus will not be described further.
However, the prior art high voltage generating circuits have several disadvantages. First, since the amount of charge required in active mode is significantly greater than the amount required in standby mode, two separate circuits must be used to generate the high voltage power supply during the two separate modes of operation.
Second, the large capacity active high voltage generating circuit increases power supply noise because it is operated in response to one master clock which results in large amounts of charge being temporarily charged and discharged.
Third, the pumping means in the active high voltage generating circuit includes a large capacity capacitor for supplying large amounts of current. The charging and discharging of this capacitor reduces the pumping efficiency and reduces the level of integration of the semiconductor memory device.
Fourth, because the large capacitor is activated for pumping operation, the pumping time increases thereby resulting in a degradation of high speed operation.